Freescale Semiconductor /MKW21Z4 /XCVR_TSM_REGS /TIMING34

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Interpret as TIMING34

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PLL_DIG_EN_TX_HI0PLL_DIG_EN_TX_LO0PLL_DIG_EN_RX_HI0PLL_DIG_EN_RX_LO

Description

TSM_TIMING34

Fields

PLL_DIG_EN_TX_HI

Assertion time setting for PLL_DIG_EN (TX)

PLL_DIG_EN_TX_LO

De-assertion time setting for PLL_DIG_EN (TX)

PLL_DIG_EN_RX_HI

Assertion time setting for PLL_DIG_EN (RX)

PLL_DIG_EN_RX_LO

De-assertion time setting for PLL_DIG_EN (RX)

Links

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